Planar GaAs nanowire tri-gate MOSFETs by vapor–liquid–solid growth

Keywords: Metalorganic chemical vapor deposition (MOCVD) Metal–oxide–semiconductor field effect transistor (MOSFET) Nanowire a b s t r a c t Depletion-mode metal–oxide–semiconductor field effect transistors (MOSFETs) with GaAs planar nano-wire (NW) channels are successfully demonstrated. The Si-doped planar GaAs NWs are grown in a selective lateral epitaxy manner via Au-assisted vapor–liquid–solid (VLS) mechanism. A SiO 2 interlayer between the multi-faceted NW and Al 2 O 3 high-k dielectric formed by atomic layer deposition (ALD) improves the NW MOSFET performance. III–V semiconductor nanowires (NWs) have received much attention recently due to their high intrinsic electron mobility and the inherent 3-dimensional geometry which facilitates the realization of multi-gate transistors [1]. Comparing with top–down approaches, bottom–up vapor–liquid–solid (VLS) growth method is of particular interest since it produces NWs with smooth facets that are free of etching damage. However, conventional VLS NWs grow out of the substrate plane, which makes them incompatible with the well-established planar processing technology and thus prevents them from entering practical electronic applications readily [2]. To address this issue, our group has recently developed a controlled VLS growth method to assemble planar and self-aligned GaAs NWs by metalorganic chemical vapor deposition (MOCVD) [3]. Unlike the out-of-plane NWs, planar NWs are grown laterally and propagate in parallel along h11 0i and h1 0 0i directions on (1 0 0) and (1 1 0) substrates, respectively [4]. The planar geometry and self-aligned nature are very attractive in terms of device integration. The epitaxially smooth multi-faceted cross-section profile makes these planar NWs ideal for multi-gate FETs [3–5]. So far high-performance MESFET and HEMT devices have been demonstrated using such planar NWs as the conduction channels [5,6]. In this letter, we further demonstrate planar NW functionality by the successful realization of depletion-mode MOSFETs based on Si-doped n-type planar GaAs NWs using Al 2 O 3 as the gate oxide. For III–V multi-gate transistors, simultaneous passivation of different crystal facets could be challenging since interface trap density has strong crystal orientation dependence [7]. We here use SiO 2 deposited by plasma-enhanced chemical vapor deposition (PECVD) as an interfacial layer between Al 2 O 3 and the GaAs NW surface to further improve the interface quality and device performance [8]. 2. Growth and fabrication GaAs planar NWs were grown on (1 0 0) semi-insulating GaAs substrate by atmospheric pressure MOCVD at 460 °C utilizing col-loidal Au particles (250 nm in diameter) as growth catalysts. Si 2 …